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Product Details

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Product Details

*The following are the basic parameters of the product, involving the characteristics of the product and its category

TYPEDESCRIPTION
Part StatusActive
RoHS StatusRoHS Compliant
Surface MountYES
JESD-609 Codee3
Time@Peak Reflow Temperature-Max (s)NOT SPECIFIED
Peak Reflow Temperature (Cel)NOT SPECIFIED
PackagingTray
Factory Lead Time10 Weeks
Qualification StatusNot Qualified
TechnologyCMOS
Published2015
Moisture Sensitivity Level (MSL)3 (168 Hours)
Terminal Pitch0.5mm
HTS Code8542.39.00.01
Terminal PositionBOTTOM
Terminal FormBALL
Terminal FinishMATTE TIN
Supply Voltage1.2V
Power Supplies1.2V
Programmable Logic TypeFIELD PROGRAMMABLE GATE ARRAY
Width11mm
SubcategoryField Programmable Gate Arrays
Lifecycle StatusIN PRODUCTION (Last Updated: 3 weeks ago)
Speed166MHz
Operating Temperature-40°C~100°C TJ
RAM Size64kB
Core ProcessorARM? Cortex?-M3
Number of I/O180
Number of Outputs180
Number of Inputs180
Length13.5mm
ArchitectureMCU, FPGA
Supply Voltage-Min (Vsup)1.14V
Supply Voltage-Max (Vsup)1.26V
ConnectivityCANbus, Ethernet, I2C, SPI, UART/USART, USB
SeriesSmartFusion?2
PeripheralsDDR, PCIe, SERDES
Number of Terminations325
Flash Size512KB
Package / Case325-TFBGA, CSPBGA
Number of Logic Cells86316
Additional FeatureLG-MIN, WD-MIN
Primary AttributesFPGA – 90K Logic Modules
Height Seated (Max)1.16mm
JESD-30 CodeR-PBGA-B325

Manufacturer introduction

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