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*The following are the basic parameters of the product, involving the characteristics of the product and its category
TYPE | DESCRIPTION |
---|---|
Part Status | Active |
RoHS Status | Non-RoHS Compliant |
Surface Mount | YES |
Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
Peak Reflow Temperature (Cel) | NOT SPECIFIED |
Packaging | Tray |
Factory Lead Time | 10 Weeks |
Qualification Status | Not Qualified |
JESD-609 Code | e0 |
Technology | CMOS |
Published | 2015 |
Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
Reach Compliance Code | not_compliant |
Terminal Finish | Tin/Lead (Sn/Pb) |
Terminal Pitch | 1mm |
HTS Code | 8542.39.00.01 |
Terminal Position | BOTTOM |
Terminal Form | BALL |
Supply Voltage | 1.2V |
Power Supplies | 1.2V |
Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY |
Subcategory | Field Programmable Gate Arrays |
Lifecycle Status | IN PRODUCTION (Last Updated: 3 weeks ago) |
Length | 23mm |
Width | 23mm |
Operating Temperature | 0°C~85°C TJ |
Speed | 166MHz |
Number of Terminations | 484 |
RAM Size | 64kB |
Core Processor | ARM? Cortex?-M3 |
Architecture | MCU, FPGA |
Supply Voltage-Min (Vsup) | 1.14V |
Supply Voltage-Max (Vsup) | 1.26V |
Flash Size | 256KB |
Package / Case | 484-BGA |
Height Seated (Max) | 2.44mm |
JESD-30 Code | S-PBGA-B484 |
Connectivity | CANbus, Ethernet, I2C, SPI, UART/USART, USB |
Series | SmartFusion?2 |
Peripherals | DDR, PCIe, SERDES |
Number of I/O | 267 |
Number of Outputs | 267 |
Number of Inputs | 267 |
Number of Logic Cells | 56520 |
Primary Attributes | FPGA – 60K Logic Modules |
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