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Product Details

*The following are the basic parameters of the product, involving the characteristics of the product and its category

TYPEDESCRIPTION
Part StatusActive
RoHS StatusROHS3 Compliant
Moisture Sensitivity Level (MSL)1 (Unlimited)
Number of Elements2
Mounting TypeSurface Mount
PackagingTape & Reel (TR)
Radiation HardeningNo
Surface MountYES
JESD-609 Codee3
Lead FreeLead Free
Contact PlatingTin
Drain to Source Voltage (Vdss)50V
Number of Terminations6
Number of Pins6
Pin Count6
Factory Lead Time4 Weeks
Published2006
Max Power Dissipation500mW
Transistor Element MaterialSILICON
Gate to Source Voltage (Vgs)20V
Operating Temperature-55°C~150°C TJ
Terminal FormFLAT
Transistor ApplicationSWITCHING
Operating ModeENHANCEMENT MODE
Power Dissipation330mW
FET TechnologyMETAL-OXIDE SEMICONDUCTOR
Fall Time (Typ)25 ns
Continuous Drain Current (ID)170mA
Turn On Delay Time13 ns
FET FeatureLogic Level Gate
Package / CaseSOT-563, SOT-666
Drain to Source Breakdown Voltage-50V
Max Dual Supply Voltage-50V
Additional FeatureLOGIC LEVEL COMPATIBLE
FET Type2 P-Channel (Dual)
Turn-Off Delay Time48 ns
SeriesAutomotive, AEC-Q101, TrenchMOS?
Rise Time11ns
Vgs(th) (Max) @ Id2.1V @ 250μA
Drain-source On Resistance-Max8.5Ohm
Drain Current-Max (Abs) (ID)0.17A
Input Capacitance (Ciss) (Max) @ Vds36pF @ 25V
Gate Charge (Qg) (Max) @ Vgs0.35nC @ 5V
Rds On (Max) @ Id, Vgs7.5 Ω @ 100mA, 10V

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