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*The following are the basic parameters of the product, involving the characteristics of the product and its category
TYPE | DESCRIPTION |
---|---|
Part Status | Active |
RoHS Status | Non-RoHS Compliant |
Surface Mount | YES |
Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
Peak Reflow Temperature (Cel) | NOT SPECIFIED |
Factory Lead Time | 12 Weeks |
Packaging | Tray |
Technology | CMOS |
Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
Terminal Pitch | 1mm |
HTS Code | 8542.39.00.01 |
Terminal Position | BOTTOM |
Terminal Form | BALL |
Supply Voltage | 1.5V |
Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY |
Frequency | 80MHz |
Core Architecture | ARM |
Length | 23mm |
Width | 23mm |
Number of Terminations | 484 |
RAM Size | 64kB |
Core Processor | ARM? Cortex?-M3 |
Architecture | MCU, FPGA |
Peripherals | DMA, POR, WDT |
Supply Voltage-Max (Vsup) | 1.575V |
Package / Case | 484-BGA |
Supply Voltage-Min (Vsup) | 1.425V |
Height Seated (Max) | 2.44mm |
Operating Temperature | -55°C~125°C TJ |
JESD-30 Code | S-PBGA-B484 |
ECCN Code | 3A001.A.2.C |
Flash Size | 512KB |
Number of Equivalent Gates | 500000 |
Series | SmartFusion? |
Connectivity | EBI/EMI, Ethernet, I2C, SPI, UART/USART |
Primary Attributes | ProASIC?3 FPGA, 500K Gates, 11520 D-Flip-Flops |
Interface | EBI/EMI, Ethernet, I2C, SPI, UART, USART |
Base Part Number | A2F500M3G |
Number of I/O | MCU – 41, FPGA – 128 |
Organization | 11520 CLBS, 500000 GATES |
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