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Product Details

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Product Details

*The following are the basic parameters of the product, involving the characteristics of the product and its category

TYPEDESCRIPTION
Part StatusActive
RoHS StatusRoHS Compliant
Surface MountYES
Number of Logic Blocks (LABs)8
Factory Lead Time12 Weeks
PackagingTray
Qualification StatusNot Qualified
TechnologyCMOS
Published2015
Moisture Sensitivity Level (MSL)3 (168 Hours)
Time@Peak Reflow Temperature-Max (s)30
Terminal Pitch1mm
Terminal PositionBOTTOM
Frequency100MHz
Terminal FormBALL
JESD-609 Codee1
Operating Supply Current1mA
Terminal FinishTin/Silver/Copper (Sn/Ag/Cu)
Supply Voltage1.5V
Operating Supply Voltage1.5V
Programmable Logic TypeFIELD PROGRAMMABLE GATE ARRAY
SubcategoryField Programmable Gate Arrays
Core ArchitectureARM
Length23mm
Width23mm
Operating Temperature-40°C~100°C TJ
Number of Terminations484
Number of Pins484
Peak Reflow Temperature (Cel)250
RAM Size64kB
Core ProcessorARM? Cortex?-M3
Number of Outputs94
ArchitectureMCU, FPGA
PeripheralsDMA, POR, WDT
Max Supply Voltage1.575V
Flash Size256KB
Package / Case484-BGA
Min Supply Voltage1.425V
Height Seated (Max)2.44mm
Number of Gates200000
SeriesSmartFusion?
ConnectivityEBI/EMI, Ethernet, I2C, SPI, UART/USART
InterfaceEBI/EMI, Ethernet, I2C, SPI, UART, USART
Base Part NumberA2F200
Primary AttributesProASIC?3 FPGA, 200K Gates, 4608 D-Flip-Flops
Number of I/OMCU – 41, FPGA – 94

Manufacturer introduction

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